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1/15 www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. ic card interface ics ic card interface ics with built-in low noise ldo regulator BD8918F,BD8918Fv,bd8919f,bd8919fv overview this is an interface ic for a 5v smart card. it works as a bidirectional signal buffer between a smart card and a controller. also, it supplies 5v power to a smart card. with an electrostatic breakdown voltage of more than hbm; 6000v, it protects the card contact pins. features 1) 1 half duplex bidirectional buffers 2) protection against short-circuit for all the card contact pins 3) 5v power source for the card (vcc) 4) over-current protection for card power source 5) built-in thermal shutdown circuit 6) built-in supply voltage detector 7) automatic activation/deactivation se quence function for card contact pin activation sequence: driven by a signal from controller (cmdvccb ? ) deactivation sequence: driven by a signal from controller (cmdvccb ? ) and fault detection (card removal, short circuit of card power, ic overheat detection, vdd or vddp drop) 8) card contact pin esd voltage R 6000v 9) recommend frequency of crystal oscillator : 8mhz (BD8918F/fv), 16mhz (bd8919f/fv) 10) programmable for card clock division of output si gnal: 1/1 and 1/2(BD8918F/f v), 1/2 and 1/4(bd8919f/fv). 11) rst output control by rstin input signal (positive output) 12) one multiplexed card st atus output by offb signal applications interface for class a smart cards interface for b-cas cards line up matrix part no card clock ratio of dividing frequency package BD8918F 1/1f, 1/2f sop16 BD8918Fv ssop-b16 bd8919f 1/2f, 1/4f sop16 bd8919fv ssop-b16 no.09056edt01
technical note 2/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. absolute maximum ratings (ta=25c) parameter symbol ratings unit notes vdd input voltage v dd -0.3 ~ 6.5 v vddp input voltage v ddp -0.3 ~ 6.5 v i/o pin voltage v min v mout -0.3 ~ +6.5 v pin: xtal1, xtal2, clksel, rstin, io_u cmdvccb, offb card contact pin voltage v cd -0.3 ~ +6.5 v pin: pres, clk, rst, io_c junction temperature t jmax +150 c storage temperature t stg -55 ~ +150 c power dissipation p tot 0.375 *1 0.500 *2 w t = -20 ~ +85c (refer to the following package power dissipation) *1 BD8918F/bd8919f, *2 BD8918Fv/bd8919fv ? this product is not designed to be radiation tolerant. ? absolute maximum ratings are not meant for guarantee of operation. operating conditions (ta=25c) parameter symb ol ratings unit notes min typ max vdd input voltage v dd 2.7 - 5.5 v vddp input voltage v ddp 4.75 - 5.5 v vcc 4.55v operating temperature t opr -40 - +85 c package power dissipation the power dissipation of a simple package in case of a boadless will be as follows. use of this device beyond the following the power dissipation may cause permanent damage. BD8918F/bd8919f pd=375mw; however, reduce 3mw per 1c when used at ta 25c. BD8918Fv/bd8919fv pd=500mw; however, reduce 4mw per 1c when used at ta 25c. fig. 1.1 BD8918F/bd8919f power dissipation fig. 1.2 BD8918Fv/bd8919fv power dissipation package power 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0 25 50 75 100 125 150 temp () pd (w) package power 0.0 0.1 0.2 0.3 0.4 0 25 50 75 100 125 150 temp () pd (w)
technical note 3/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. block diagram fig. 2 BD8918F/fv f=8mhz bd8919f/fv f=16mhz tsd xt osc clk div sequencer ldo io trans vcc rst clk pres io_c cgnd 2.7v-5.5v xtal1 clksel io_u gnd cmdvccb rstin offb divclk 4.75v-5.5v alarm ioen lvs vdd vddp lvs power_on vdd vccen rsten clken diven vcc alarm tsd alarm f max 1mhz 5v rst buf lv s viref vdet lvs vref clk buf lvs vdd vcc vdd 1f 10f 0.1uf xtal 2 22 pf 22pf 11k 11k 50k 50k 50k vdd 20k vdd 50k 220
technical note 4/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. pin description pin no. pin name i/o signal level pin function 1 xtal1 i vdd crystal connection or input for external clock 2 xtal2 o vdd crystal connection (leave open pin when external clock source is used) 3 vdd s vdd 3.3 v power source pin for host interface. connect 0.1f capacitor between the vdd and gnd pins. 4 clksel i vdd input for clock frequency division setting. pulled down to gnd with a 50k ? resistor. BD8918F/fv h: 1/1 division; l: 1/2 division. bd8919f/fv h: 1/2 division; l: 1/4 division. 5 rstin i vdd card reset signal input. pu lled down to gnd with a 50k ? resistor. 6 io_u i/o vdd host data i/o line; pulled up to vdd with an 11k ? resistor 7 cgnd s gnd gnd 8 io_c i/o vcc i/o data line on the card side. pulled up to vcc with an 11k ? ? resistor. 9 rst o vcc card reset output 10 clk o vcc card clock output 11 vcc o vcc card supply voltage. connect 1f capacitor between vcc and the cgnd pins. 12 vddp s vddp 5v power source pin for card power feed. connect 10f capacitor between the vddp and cgnd pins. 13 pres i vdd card presence contact input (?h? active). pulled up to vdd with a 50k ? resistor. connected to a switch where gnd level is inputted when no card is inserted and open is inputted when a card is inserted. when ?h? level is detected, a card is assumed to be inserted and waits for t he cmdvccb input for the confirmation, after the debounce time of typ. 8ms. 14 offb o vdd alarm output pin (?l? active). nmos open drain output. pulled up to vdd with a 20k ? resistor. 15 cmdvccb i vdd activation sequence command input; the activation sequence starts by signal input (h ? l) from the host 16 gnd s gnd gnd *capacitors to be connected to vdd, vddp and vcc shoul d be placed immediately next to the pins (esr<100m ? ).
technical note 5/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. pin function diagram pin name pin function diagram pin name pin function diagram 1xtal1 8io_c 2xtal2 3vdd 9 rst 4clksel 10 clk 5rstin 6io_u 11 vcc 7cgnd pin no. pin no. 3 vddp 9 vreg vreg 10 vddp vdd 4,5 50k vddp 8 vreg 11k vreg 5 11 k vdd vdd 2 1 1. 2 m vdd 100 vdd vddp 1 11 vddp
technical note 6/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. pin name pin function diagram pin name pin function diagram 12 vddp 14 offb 13 pres 15 cmdvccb 16 gnd pin no. pin no. 12 15 vdd 50k vdd vdd 14 20k 13 vdd 5k vdd
technical note 7/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. package package name: sop16 note : x is 8 or 9. fig. 3.1 sop16 package dimension package name: ssop-b16 fig. 3.2 ssop-b16 package dimension (unit : mm) (unit : mm) (un 4.4 0.2 6.4 0.3 1.15 0.1 9 8 16 1 0.10 0.65 0.3min. 5.0 0.2 0.22 0.1 0.15 0.1 0.1 1pin mark lot no. d891x 8 0.1 16 1.27 0.11 1 9 0.3min 10 0.2 0.15 0.1 0.4 0.1 1.5 0.1 6.2 0.3 4.4 0.2 (max 10.35 include burr) bd891xf 1pin mark lot no.
technical note 8/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. function 1) power supply power supply pins are vdd and vddp. set vdd at the same voltage as the signal from the system controller side. vddp and cgnd are for the 5v power source and gnd, respectively, on the card side. 2) input voltage detector the ic remains in wait mode until the power on reset is re leased 16ms after the vdd supply voltage is increased over vthd and the vddp supply voltage is increased over vt hp, making the cmdvccb signal turn from h to l. vthd=1.7v(typ) vthp=2.25v(typ) 3) operation sequence 3-1) wait mode the ic remains in wait mode until the power on reset is re leased after the vdd supply volt age is increased over vthd and the vddp supply voltage is increased over vthp, making the cmdvccb signal turn from h to l. in this mode, the vdd and vddp supply voltage detector (vde t), thermal shutdown circuit (tsd), reference circuit (vref) and crystal oscillation circuit (xt osc) are activated. io_u is pulled up to vdd with an 11k ? resistor and all the card contact pins are at lo level. 3-2) card presence card presence is detected by pres pin. when the pres pin is active, a card is assumed to be present. table 1 pres ?high? active when a card is present in wait mode, the card insertion identific ation pin, pres (?h? active) becomes active and offb becomes ?h? after approx. 8ms (debounce time). if a card is present before the vdd and vddp power sources are applied and the internal reset is released, it is internally reset and offb becomes ?h? after the debounce time. the pres pin is pulled up to vdd with a 50k ? resistor. descriptions of transition times (example. debounce time: 8msec) for the operation sequences are adapted in the conditions of the following input frequency. 8mhz (BD8918F/ fv), 16mhz (bd8919f/ fv)
technical note 9/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. art t0 cmdvccb t1 t2 t3 t4= tact vcc io_c clk rstin rst io_u min:200ns art t0 cmdvccb t1 t2 t3 t4= tact vcc io_c clk rstin rst io_u 3-3) activation sequence when offb is in the ?high? state and the cmdvccb signal from the controller turns from h to l, the activation sequence starts to activate each functional block in the following order: the rst outputs signals based on the rstin input, being reset approximately 472 ? sec after the cmdvccb signal turns from h to l. the rstin input becomes effective approximately 48 ? s after i/o trans turns on. if rstin becomes lo after rstin becomes effective and the rst output is releas ed, the clk signal is output. if rstin is high when the rst output is released, the clk signal is out put as soon as the rst output is releas ed. (refer to fig. 4-1, 4-2 and 4-3) ldo on (vcc output) ? i/o trans on (io_c, io_u bus: pull-up) ? __________________________________________________ ? ? when rstin remains high until rst is released ? (rstin ? always high) ? (rstin=always high) ? ? clk buf on (clk output) clk, rst buf on (clk output, rst release) ? rst buf on (rst release) [activation sequence under different rstin input timings] fig. 4-1 activation sequence 1 fig. 4-2 activation sequence 2 fig.6-3 ?` 3 fig. 4-3 activation sequence 3 (rstin input sequence not specified by iso7816) t1: ldo startup time = typ. 24s t2: i/o on time = typ. 424s t3: clk output release time (t3-t2) = min. 200ns t4: rst release time = typ,472s, max. 481 ? s (activation time) art t0 cmdvccb t1 t2 t3 t4= tact vcc io_c clk rstin rst io_u
technical note 10/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. 3-4) deactivation sequence when the cmdvccb input turns from l to h or the alarm signal (described later) is detected, the following deactivation sequence is initiated in the following or der, transitioning to the wait mode. rst buf off (rst: lo) ? clk buf off (clk: lo) ? i/o trans off (i/o bus on the controller side: pull-up) ? (i/o bus on the card side: lo) ? ldo off (vcc: lo) fig. 5 deactivation sequence 4) ldo ldo supplies power to the ic card through vcc pin. this regulator has a built-in over-current limiter circuit. it gener ates an internal alarm with a load current of approximately 140ma or more and enters into the deactivation sequence. also, the output voltage is regarded as abnormal if it drops to less than 1.6v and the output current is shut off; an internal alarm signal is generated and the deactivation sequence is initiated. connect a capacitor of 1f or 2.2f between vcc and cgnd as close as possible to the vcc pin, in order to reduce the output voltage variation as much as possible. also, ensure that esr is kept at less than 100m ? . ldo output is also a power source for clk, rst and io_c out put. therefore, the clk, rs t and io_c output level is the same as the vcc output level. 5) i/o data transitions the data line, io_c - io_u, transmits/receives two-way data. the io_u pin for the controller side is pulled up with an 11k ? resistor to high (vdd voltage) and card contact pins io_c is set to lo until i/o trans becomes on by the activation sequence. when i/o trans becomes on, ic becomes idle mode and the i/o pin is pulled up with an 11k ? resistor to keep the io_u pin to vdd voltage (high) and the io_c pin to vcc voltage (high). the pin which turns to l from h first becomes the master and the other output side becomes the slave between the pins on the controller side and card contact pins. then the data are transferred from the master side to the slave side. when the both signal levels become high, they become idle mode. when the signal transits from l to h and it passes over a thresh old, an active pull-up (100 ns or less) works to drive the data high at high speed. after the active pull-up is completed, the pin is pulled up with an 11k ? resistor. after the active pull-up is completed, the pin is pulled up with an 11k ? resistor. this function enables signal transmission up to 1mhz. also, an over-current limiter of 30ma in the card contact pin, io_c. t11: clk off time = typ. 10s t12: i/o off time = typ. 20 s t13: starting time of vcc fall = typ. 30 s tde: operational sequence completion time =max. 200 s cmdvccb vcc i/o clk rst t10 t11 t12 tde t13
technical note 11/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. 6) card clock supply card clock is supplied from the clk pin dividing the input frequency of xtal1 pin with the clksel pin setting. the clock division switching time is within the 8 clocks of the xtal1 signal. the input signal to the xtal1 pin is made by a crystal oscillator (BD8918F/fv:8hz, bd8919f/fv:16mhz) between the xtal1 pin and xtal2 pin or external pulse signal. when a crystal oscillator is used, the voltage between xta l1 and xtal2 may decrease to become close to ?-1v?, which is not a problem. when an external pulse signal is applied to the xtal1 pin (exc ept for signal input by crystal oscillation), the duty of the xtal1 pin should be 48% - 52% and the trans ition time of the xtal1 pin should be within 5% of the signal cycle to ensure the duty factor of 45% - 55% at the clk pin. table 2 clock frequency selection (f xtal : frequency at xtal1) 7) rstin input, rst output the rstin input becomes effective after the cmdvccb signal input turns to l from h, activation sequence is initiated and approximately 48 ? s after i/o trans turns on. the rst output is released in approximately 472 ? sec (max. 481 ? sec) after the cmdvccb signal turns from h to l to output a signal based on the rstin input. 8) fault detection when the following fault state is detected, the circuit enters the wait mode after it generates an internal alarm signal and is deactivated. if a card is not present, it remains in the wait mode. ? when the vcc pin becomes less than 1.6v, or is loaded high current (typ: 140ma) ? when vddp voltage is less than the threshold voltage (detected by supply voltage detector) ? when a high temperature is detected by the thermal shutdown circuit ? when the card is removed during operation or the card is not present from the beginning (pres=l) 9) offb output the offb output pin indicates the ic is ready to operate. it is pulled up to vdd with a 20k ? resistor. when the ic is in the read y state, offb is high. after activation, the offb outputs off stat e (lo) when a fault state is detected. when a card is present and cmdvccb be comes high, the internal alarm is released and the offb output becomes high. fig. 6 offb, cmdvccb, pres, vcc operation BD8918F/fv clksel f clk bd8919f/fv clksel f clk 1 xtal f 1 2 xtal f 0 2 xtal f 0 4 xtal f ?`????? `????? t debounce t debounce pres offb vcc t debounce = typ 8ms cmdvccb shutdown by card removal shutdown by short-circuiting of pins
technical note 12/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. an example of software control fig. 7 an example of software control start offb=h ? no (no card) yes (card detect) error message 1 ? card insert cmdvccb: h l activation start regulator on (vcc) io enable (io) card communication start rstin: l h complete cmdvccb: l h deactivation start io disable (io) regulator off (vcc) end end cmdvccb: l h no alarm offb=l ? alarm detect ? card off ? over current ? drop vddp ? thermal shutdown * ensure to set cmdvccb lh to confirm that lsi could detect alarm at the host side end error message 2 ? detects error at card communication deactivation start io disable (io) regulator off (vcc)
technical note 13/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. application examples BD8918F/fv application examples fig.8 fig.9 xtal 1 gnd cmdvccb offb pres 1uf card connection io _ c clksel vdd vddp vcc clk rst c5 c6 c 1 c 2 c7 c8 c 3 c 4 k 1 k 2 0. 1uf 1 2 3 4 5 6 7 8 13 12 11 10 9 16 15 14 0.22 uf controller +5v 10uf +3. 3v cgnd rstin io _ u BD8918F/ BD8918Fv xtal1 xtal2 gnd cmdvccb offb pres 1 f card connection clksel vdd rstin io_u vddp vcc clk rst c5 c6 c1 c2 c7 c8 c3 c4 k1 k2 0.1f BD8918F/ BD8918Fv 1 2 3 4 5 6 7 8 13 12 11 10 9 16 15 14 (22pf ) (22pf) 0.22f controller +5v 10f +3.3v 8mhz 220 cgnd io_c
technical note 14/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. bd8919f/fv application examples precautions for use 1) the capacitor for the vcc pin should be placed as close as possible to the ic between vcc and cgnd so that the esr becomes less than 100 ? 2) connect a capacitor of over 0.1f for vdd and over 10f fo r vddp as close as possible to the ic so that the esr becomes less than 100m ? to reduce the power line noise. we recommend t he use of capacitors with the largest possible capacitance. xtal1 xtal2 gnd cmdvccb offb pres 1f card connection io_c clksel vdd rstin io_u cgnd vddp vcc clk rst c5 c6 c1 c2 c7 c8 c3 c4 k1 k2 0.1f bd8919f/ bd8919fv 1 2 3 4 5 6 7 8 13 12 11 10 9 16 15 14 (22pf) (22pf) 0.22f controller +5v 10f +3.3v 16mhz 220
technical note 15/15 BD8918F,BD8918Fv,bd8919f,bd8919fv www.rohm.com 2010.4 - rev.d ? 2009 rohm co., ltd. all rights reserved. ? ordering part number b d 8 9 1 8 f v - e 2 part no. part no. 8918 8919 package f: sop16 fv: ssop-b16 packaging and forming specification e2: embossed tape and reel (unit : mm) sop16 8 0.1 16 1.27 0.11 1 9 0.3min 10 0.2 0.15 0.1 0.4 0.1 1.5 0.1 6.2 0.3 4.4 0.2 (max 10.35 include burr) ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin (unit : mm) ssop-b16 4.4 0.2 6.4 0.3 1.15 0.1 9 8 16 1 0.10 0.65 0.3min. 5.0 0.2 0.22 0.1 0.15 0.1 0.1 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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